Designing with Xilinx Virtex: Overview & Booking

Duration: 3 days.

Overview
Esperan’s Designing with Xilinx course combines both technology and methodology content to demonstrate not just the features of Xilinx Virtex technologies and ISE tools, but also how to utilize these features in a VHDL or Verilog design flow, using the most popular third-party simulation and synthesis tools. This blend of technology and methodology focus creates an indispensable “value-added” course, far beyond that offered by other training providers, and providing a short-cut to years of Xilinx design experience.
By showing you how to take full advantage of the Xilinx Virtex technologies, Esperan’s effective, focused training can help you create smaller, faster designs using cheaper devices in shorter timescales.

Objectives

• To provide an in-depth understanding of the Virtex-E and Virtex-II technology resources and the ISE design software features.
• To show you how to write VHDL or Verilog code to target Virtex technology resources and produce optimal synthesis results.
• To demonstrate the tricks and traps of an efficient Xilinx design methodology, utilizing the full capabilities of the Virtex technologies.

Prerequisites
Delegates should have a basic knowledge of digital hardware design and be familiar with their choice of operating system. No prior knowledge of Xilinx tools or technology is assumed. Some previous knowledge of VHDL or Verilog would be useful, but it is not essential.