Esperan - the EDA Training Company
       
Course Menu
   
   
 
 
 
 
 
 
 
Verification with C++: Overview & Booking
 
Technical Details

Why C++ for EDA?
C++ is ubiquitous in software engineering. Its uses spread from driver development all the way to the creation of operating systems. With the recent advances in EDA verification methods, there has been a increasing need for a programming language that supports high level advanced design and analysis paradigms.
C++ natively promotes design maintainability as well a design reuse. In addition, C++ benefits from a wealth of available resources for efficient data manipulation and generation, encryption/decryption algorithms, file processing and more.

Course Overview
Esperan´s C++ for Verification covers all of the C++ language features essential for the creation of advanced programs, including templated classes, inheritance, virtual functions, late binding and the Standard Template Library (STL). This training minimises learning time and confusion by giving students concise, focused guide to specific topics.
This course can be used to as a precursor to the Fundamentals of SystemC class for engineers without C++ experience.

Duration
2 days. We can also offer standard or customized versions of this workshop onsite or at the location of your choice.

Objectives

  • To explain the concepts of object-oriented programming.
  • To provide a solid background in C++ and an understanding of the language features essential for writing advanced applications.
  • To describe the use of data processing, file processing and STL through worked examples and hands on laboratories.
  • To give you hands-on practical experience in applying SCV.

Prerequisites
Delegates must have a good working knowledge of a sequential programming language - ideally C, but alternatively VHDL, Verilog or Perl are all useful. Familiarity with hardware design is helpful, but not essential. If you have any queries on the prerequisites for this courses, please do not hesitate to contact Esperan.

Contact Esperan for the latest course information

News
 
 
Technical Assets
 
 
 
 
   
Course Schedule
 
 
curve For over 10 years..
  Esperan has been providing VHDL training and Verilog training in UK, US, Canada, Western Europe, South Africa and throughout the world.
 
Esperan contact information US contact information
Phone +44 1344 865436 Fax +44 1344 865347
Email info@esperan.com
Tollfree Tel. 1800 220 8148 Fax. 1888 641 6431
Email US-sales@esperan.com