Esperan SystemC Tutorial - SystemC Worked Example


HOME ABOUT US SUPPORT RESOURCES CONTACTS	SITE MAP

	Course Menu

	VHDL Training
	VHDL Application Designing with VHDL Verification with VHDL VHDL for Verilog Engineers

	Verilog Training
	Verilog Application Verilog for VHDL Engineers

	SystemVerilog
	SystemVerilog Design SystemVerilog Verification SystemVerilog Assertions SVA & Formal Verification

	PSL Training
	Verification with PSL PSL & Formal Verification

	Specman Elite & e
	e Verification Environments Advanced Verification

	C++/SystemC
	Verification with C++ SystemC Fundamentals Verification with SystemC Transaction Level Modeling

	PCB Design
	High Speed PCB Design Minimising EMI

	Tcl/Tk and Perl
	Tcl Scripting for EDA Perl Programming

	FPGA Design
	Designing with Altera Designing with Xilinx

SystemC Worked Example

Tutorials > SystemC > Worked Example

SystemC Setup

These instructions assume that you are operating under a Linux environment. Alternatively you can install cygwin on an existing Windows environment. For versions or platform specific information, please refer to the INSTALL file inside the SystemC tar file.

Download the SystemC core
1. Go to www.systemc.org and create an account
2. Go to download page and download the version 2.0.1 version of SystemC core, systemc-2.0.1.tgz
Note if you are using a cygwin based environment you may want to download SystemC version 2.1 instead.

Uncompress the SystemC core
1. gunzip –d systemc-2.0.1.tgz
2. tar –xvf systemc-2.0.1.tar
Note: By default the files will be extracted to directory systemc-2.0.1.

Install SystemC core
1. Change to the directory systemc-2.0.1.
  cd systemc-2.0.1
2. Create a temporary directory and change into it
  mkdir objdir
  cd objdir
3. Set the environment
  setenv CXX g++
4. Configure the package for your system
  ../configure
5. Compile the package
  gmake (or make)
6. Install the package
  gmake install or make install
7. Remove the temporary directory
  cd ..
  rm –rf objdir

Waveform Viewer Setup

A waveform viewer will allow you to graphically display a VCD trace file from SystemC simulation. Two free-ware VCD viewers are recommended. Other tools are available.

Download Dinotrace or GtkWave
Install the waveform viewer according to its instructions

Workshop Files Setup

Download Esperan’s SystemC workshop file
Uncompress the archive
gunzip –d sc_tutorial.tgz
tar –xvf sc_tutorial.tar
Note: By default the files will be extracted to directory sc_tutorial
Move to the Makefile directory
cd sc_tutorial
Configure the Makefile for your environment
1. Edit the file: Makefile.defs
  vi Makefile.defs
2. Modify the SystemC installation path
  SYSTEMC = put_your_installation_path_here
  e.g. SYSTEMC = /usr/local/SystemC/systemc-2.0.1

Running the SystemC Counter Example

Move to the workshop directory
cd simpleCounterSC
Compile the counter example
make –f Makefile.osci
Execute the simulation
./run.exe
Examine the results of the simulation
gtkwave trace.vcd & or alternatively dinotrace trace.vcd &

		News
		Latest Developments


		Technical Assets

		Tutorials
		Index SystemVerilog PSL SystemC

		Hardware
		Development Board

		Software
		SystemC LiveCD

		Webseminars
		Coming Soon.. Archive


		Course Schedule

		North America UK and Scandinavia Germany France Israel


		For over 10 years..

		Esperan has been providing VHDL training and Verilog training in UK, US, Canada, Western Europe, South Africa and throughout the world.

Esperan contact information	US contact information
Phone +44 1344 865436 Fax +44 1344 865347 Email info@esperan.com	Tollfree Tel. 1800 220 8148 Fax. 1888 641 6431 Email US-sales@esperan.com