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What is SystemC?
SystemC is an open source hardware design and verification language based on C++.
SystemC allows engineers to apply powerful, proven software techniques, such as
object-orientated design, to the problems of system modeling and verification.
Although applicable to system and hardware design, SystemC is most effective as a
verification and testbench design language.
Course Overview
Esperan's SystemC course begins with Essential C++ for SystemC, covering all of the C++
language features essential for an understanding of SystemC, including classes, inheritance,
virtual functions, templates and late binding.
The course then continues with the
fundamentals of SystemC, describing the features of the language and exploring how it can
be used for system, hardware and verification modeling.
Duration
5 days, consisting of a 2 day Essential C++ for SystemC module and a 3 day
Fundamentals of SystemC module.
Objectives
- To explain the concepts of object-oriented programming.
- To provide a solid background in C++ and an understanding of the
language features essential for writing effective SystemC code.
- To describe in detail the fundamental building blocks, data types and
language constructs of SystemC
- To explain, illustrate and give you practical experience of modeling
techniques using the full features of SystemC.
Prerequisites
Delegates must have a good working knowledge of a sequential programming language -
ideally C, but alternatively VHDL, Verilog or Perl are all useful. Familiarity with
hardware design is helpful, but not essential. No prior knowledge of C++ is required. If you have any queries on the prerequisites for
this courses, please do not hesitate contact Esperan.
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SYSTEMC FUNDAMENTALS |
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