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Public Course Schedule for France and Southern Europe 2008

Velizy France  
 
For further information or to register, please contact Esperan France.
 
21-Jan-2008   VHDL Application Workshop 5 Days
28-Jan-2008   Verification with PSL 2 Days
4-Feb-2008   SystemVerilog for Design and Verification 5 Days
11-Feb-2008   High-speed PCB Design 3 Days
14-Feb-2008   Minimising EMI 2 Days
18-Feb-2008   Verilog for VHDL Engineers 3 Days
25-Feb-2008   TCL Scripting for EDA 2 Days
3-Mar-2008   Verilog Application Workshop 5 Days
17-Mar-2008   SpecMan Elite Verification Environment 5 Days
25-Mar-2008   Designing with VHDL 4 Days
25-Mar-2008   Specman Elite Advanced Verification 3 Days
2-Apr-2008   SystemC Fundamentals 5 Days
7-Apr-2008   Verification with VHDL 4 Days
28-Apr-2008   TCL Scripting for EDA 2 Days
14-May-2008   VHDL for Verilog Engineers 3 Days
19-May-2008   VHDL Application Workshop 5 Days
26-May-2008   SystemVerilog for Design and Verification 5 Days
2-Jun-2008   Verification with PSL 2 Days
9-Jun-2008   High-speed PCB Design 3 Days
9-Jun-2008   Verilog Application Workshop 5 Days
12-Jun-2008   Minimising EMI 2 Days
16-Jun-2008   SpecMan Elite Verification Environment 5 Days
25-Jun-2008   SystemC Fundamentals 5 Days
 
Other public courses can be scheduled as required. If you are interested in a particular course or date not shown here, please contact Esperan. We will always try our best to meet your requirements.

All courses are available as private on-site or off-site courses. Esperan can even provide pre-configured laptop training machines.

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curve For over 10 years..
  Esperan has been providing VHDL training and Verilog training in UK, US, Canada, Western Europe, South Africa and throughout the world.
 
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Phone +44 1344 865436 Fax +44 1344 865347
Email info@esperan.com
Tollfree Tel. 1800 220 8148 Fax. 1888 641 6431
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