Related Classes: Specman Basics for Environment Users
Duration | Requirements | Agenda
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Testimonials
"Great class ... can't wait to start writing my own environments"
Introduction
This course follows on from the Specman Basics for Environment Users course by showing how to create powerful verification environments using the Specman Reuse Methodology.
Overview
In this course, you will learn how to create verification environments using the e language for Specman Elite®.
The course is based on a coverage driven verification methodology, which is applicable for a broad range of designs. The material focuses on how to create modular, reusable e-based verification environments for Specman.
Objectives
Upon completion of this course you will have a better understanding of verification methodologies, and be able to apply these methodologies to rapidly create an efficient Specman environment for thorough design verification.
Course objectives include:-
- Understanding the architecture of a reusable verification environment.
- Creating Bus Functional Model (BFM), monitor, sequencer and agent components.
- Connecting components to RTL design signals.
- Building and configuring flexible, reusable environments.
- Advanced stimulus generation.
- Checking results using scoreboards and assertions.
- Collecting and analyzing functional coverage.
Duration
3 days. The course can also be combined with the 2-day Environment Users class to make a comprehensive 5-day Specman Basics training.
Requirements
Delegates must have attended the Specman Basics for Verification Users class as this course assumes prior knowledge of Specman and e from a users perspective.
Description
This is the only course that covers the latest Specman Elite version. The course uniquely utilises direct and unrestricted access to the insight, knowledge, experience and support from the people who create Specman Elite.
The topics covered in this course include:
- Overview of the design verification process
- Concepts and dynamic structures
- Automating constraint-driven random stimulus generation and variation
- Interfacing to the HDL design (driving and sampling)
- Constructing flexible and powerful stimulus sequences
- Implementing data and protocol/assertion checks
- Functional coverage
- Designing verification environments for reuse
- Debugging verification environments
Agenda
- Architecting the Verification Environment
- e Reuse Methodology eRM
- Agents, BFM’s and Monitors
- Packing and unpacking
- Ports mechanism
- Creating sequence libraries
- Verification Environment API
- Constraints topology
- Data Checking
- Scoreboarding
- Temporal Checking (Assertions)
- Advanced Functional Coverage
- Controlling the Verification Environment
- Message Loggers
- Objection mechanism
- Handling reset
